Computer Memory Timeline 2

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Computer Memory Timeline 2 - Timeline Help

Computer memory timeline 2 of 4 from 1952 to 1968 at Timeline Help.

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- 1968

The EDVAC computer is created with a 1024 44-bit words of ultrasonic memory.
The ENIAC gets a core memory device.

IBM 701 first stored-program vacuum tube computer with a cathode ray tube memory of 2k 36 bitwords.
American engineer Kenneth Olsen builds the Memory Test computer with a ferrite-core memory.

First mass-production of the IBM 650 magnetic data-storage drum calculator. The first mass-produced devices in computer memory timeline 2.
First commercial ferrite-core memory UNIVA 1103A.

China-born American An Wang gets the patent for the magnetic memory core.
The National Security Agency approves the creation of the IBM fast memory development task Silo, and for the study Plantation to examine a 10 megapulse, 60 bit word, 2 microsecond core memory CPU.
IBM completes its high precision floating decimal and a CRT memory Naval Ordinance Research Calculator NORC.

IBM 1401 magnetic core memory series.
First transistorized 64-bit memory computer with memory protection and interleaving.
IBM 7030 Stretch 64-bit data word and 32/64-bit instruction word computer.

Atlas virtual memory.

IBM 360 8-bit byte multiprogrammer with memory protection and interleaving.

British computer scientist Maurice Wilkes develops the idea of a cache computer memory.
First integrated circuit random access memory application based on Read Only Memory ROM.

Hewlett-Packard HP 2116A 8K memory real-time computer.
First integrated semiconductor RAM circuits for high speed memory.
Intel launches the semiconductor chip with 2,000-bit memory.

First automated design devices for creatiing CAD complex integrated circuits.

Data General launches the 32-kilobytes memory Nova.
Analog and digital memory are integrated on one chip by Dedicated Current Source.
Robert Dennard invents and patents his Dynamic Random Access Memory DRAM.

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Bibliography of the Computer Memory Timeline 2

Przybylski, S (1990) Cache and Memory Hierarchy Design. Performance Directed Approach. The Morgan Kaufmann Series in Computer Architecture and Design
Brent Morris, S (1998). Magic Tricks, Card Shuffling and Dynamic Computer Memories. Spectrum.
Marshall, A and Natarajan, S (2001). SOI Design. Analog, Memory and Digital Techniques.
Young, R (2002). How Computers Work. Processor and Main Memory.
Howard, D (2003). Sharing Digital Photos. The Future of Memories.
Larus, J and Rajwar, R (2007). Transactional Memory. Synthesis Lectures on Computer Architecture.
Dongarra, J, Duff, I, and Sorensen, D. Solving Linear Systems on Vector and Shared Memory Computers.

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